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AMD Zen 6 Firmware Hints at a RISC-V Security Core Inside the Secure Processor

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  • AMD Zen 6 Firmware Hints at a RISC-V Security Core Inside the Secure Processor
A photograph of an AMD Ryzen 5 9600X desktop processor, the Zen 5 generation preceding the Zen 6 chips discussed in this article.

The clearest hint yet about the security hardware inside AMD's upcoming Zen 6 processors arrived not in a launch presentation but in a firmware changelog. A commit to the linux-firmware repository adds version 4 of the AMD Platform Management Framework trusted application for a platform identified as 1AH_M80H, and its description states that the application now runs on the RISC-V based trusted execution environment. Phoronix's Michael Larabel spotted the line and noted that he could find no other public reference to a RISC-V trusted execution environment in a Ryzen or EPYC part.

The platform identifier matters because it ties the change to Zen 6 client silicon. Family 1Ah, Model 80h is the designation that has appeared in AMD's own kernel work for upcoming Zen 6 processors, including thermal sensor support for Models 80h through 8Fh that was posted in May. AMD has also listed Zen 6 products in its own documentation, including Olympic Ridge and a socketed Medusa design for the AM5 platform, and Linux enablement continues to land ahead of launch.

Every modern Ryzen and EPYC processor carries a small, separate processor that starts before the main x86 cores. AMD calls it the AMD Secure Processor, formerly the Platform Security Processor. It verifies firmware at boot, holds cryptographic keys, runs the firmware trusted platform module, and, on server parts, manages Secure Encrypted Virtualization memory encryption. For its entire life, that block has been an Arm Cortex-A5 core running TrustZone, licensed from Arm. A shift to RISC-V would end more than a decade of that arrangement.

The trusted application named in the commit is part of that secure world. The Platform Management Framework applies power and thermal policy, the logic that adjusts how a laptop behaves according to its power source, lid state, and sensor input, and the Linux amd-pmf driver communicates with it. Version 4 also brings a larger shared-memory layout and an extended set of policy conditions, including up to 20 custom BIOS inputs, giving manufacturers more scope to tune individual machines.

The wording still leaves the central question open. The commit says the trusted application runs on the RISC-V based trusted execution environment. It does not say that the entire Secure Processor has dropped Arm. AMD could have added a dedicated RISC-V core for certain trusted applications while retaining the Cortex-A5 for boot and key management, or it could have moved the whole block over. AMD has not commented, and a single firmware description cannot settle the matter on its own.

A move would not be unprecedented. NVIDIA replaced its in-house Falcon microcontrollers with RISC-V cores years ago, and the GPU System Processor that now handles much of its driver work is RISC-V based. Google's OpenTitan root of trust is also RISC-V. The attractions are clear: no per-core royalty, freedom to customize the instruction set, and an open specification auditors can read in full.

For buyers, nothing should change in daily use, because the firmware trusted platform module and the security checks in Windows 11 would present the same interface. For security researchers, the stakes are higher. The Secure Processor has been a recurring target, from the CTS Labs disclosures in 2018 to a 2021 voltage-glitching attack by researchers at TU Berlin that defeated its integrity checks. A new core and firmware would create fresh attack surface, and much existing research tooling would not carry over. The full picture should emerge when AMD publishes its Zen 6 security documentation, or when the first retail chip reaches a test bench.

Chips & Semiconductors
Processors
Cybersecurity
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